[None][fix] Allow MiniMax-M3's to use separate draft KV cache in disagg - #17341

…he in disaggregated serving

The nvbug 5807902 WAR disables the separate draft KV cache manager
whenever a cache transceiver is configured. MiniMax-M3 cannot take the
shared-manager path that WAR forces: its cache manager declares
supports_shared_draft_layers=False, and the drafter then inherits the
target's tokens_per_block=128 pages, which miss the SM10x Eagle context
cubins (the unfused-MHA fallback requests a 6.17 TiB workspace on a
real 32K-token warmup) and hit the known tokens_per_block=128
trtllm-gen generation-kernel IMA. Both context and generation workers
crashed during startup on every disaggregated Eagle3 attempt.

Exempt MiniMax-M3 from the WAR so both worker roles keep the designed
tokens_per_block=32 separate draft manager (symmetry is required for a
consistent target pool layout across the KV transfer).

Validated on Lyris GB300 (2xCTX TP2 + GEN TP4/ADP, NIXL): startup
completes end to end, and the test_nvfp4_eagle3 chat-GSM8K acceptance
workload measures AL 3.330 disagg vs 3.474 aggregated on the same
build (drafter card reference 3.518). The remaining gap is the
transceiver not transferring draft-layer KV, tracked separately.

Signed-off-by: Zheyu Fu <zheyuf@nvidia.com>